CPU验证工程师（北京/苏州）
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岗位职责：
1 开发处理器核、多核以及模块级验证环境
2 制定验证计划
3 开发/运行/调试测试用例以及功能覆盖点
4 使用多种验证工具、平台，例如形式化验证工具，Emulator
5 开发/维护仿真测试平台基础设施
 
所需技能：
1 计算机科学、计算机工程或电子工程等相关专业学位
2 有以下至少一项经验
  - 计算机体系结构知识
  - 验证环境开发，如UVM/OVM
  - 编写测试用例，开发检查器，覆盖率分析，错误调试，错误原因分析
  - 形式化验证
  - 指令集模拟器
  - 汇编语言编程，随机指令序列生成器，系统底层软件
3 熟悉以下至少一种编程语言：C/C++, Perl, Python, Ruby
4 良好的团队合作精神，工作态度积极
 
CPU DV Engineer
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Responsibilities:
You will work in fast growing team and will participate in one or several of below tasks
1 Define/develop the verification environment for the core, core submodule, and full chip
2 Create verfication test plans
3 Develop/run/debug testcases and function coverage
4 Use a wide set of verification tools and platforms, including formal verification tool, emulator
5 Develop/maintain regression infrastruction for core DV
 
Qualifications:
1 M.S. or B.S. in Computer Science or Computer Engineering or Electrical Engineering
2 Experience in at least one of following areas:
  - Computer architecture knowledge
  - Verification environment development in Verilog, Specman, System Verilog UVM/OVM
  - Verification and debug experience including testcase writing/generation, checker
    development, coverage analysis, failure debug, root cause analysis
  - Formal verification
  - Instruction set simulator (ISS)
  - Assembly language programming, code generation, or other low-level software experience.
3 Programming experience in at least one language: C/C++, Perl, Python, Ruby, etc.
4 Strong communication and collaboration skills