专业要求：
1.Analysis, design of high speed (1-6Gb/s) analog and mixed-signal integrated circuits for wireline applications, such as PLL, VCOs, high speed I/O, equalizer, SERDES, CDR, etc.
2.Custom design of high speed CMOS digital circuits.
3.Supervise layout of analog circuits and high-speed digital circuits.
4.Self-motivated and also able to work as member of a small team.
职位描述：
1.Experience and good understanding of analog and mixed-signal blocks, including some of the following areas: (a). PLL/DLL, regulators, VCOs, etc.(b). high speed (multi-Gbps) interfaces, wireline driver, receiver, equalizer, etc. (c). high speed SERDES, CDR.
2.Experience with design and layout tools such as Cadence Virtuoso, Cadence Spectre-RF, HSPICE, or other similar simulators and layout tools.
3.Good understanding of semiconductor devices and technology.
4.MS or PhD degree in analog and mixed-signal IC background.